TDES/DES Core

Tallika’s 3DES/DES core is a silicon proven, flexible and scalable solution built by experts with years of experience in building security solutions for commercial as well as government applications in Networking, Storage and Consumer market segments.
Features:

• Available on Tallika Secure SOC FPGA Platform with Tallika Security API
• Fully compliant with NIST FIPS PUB 46-3, CBC/ECB modes in NIST PUB 81
• 56-bit DES and 168-bit Triple-DES implementations
• Supports both encryption and decryption
• User configurable for number of ciphers per cycle to suite design requirements
• Provides ability to pre-load Initialization Vector (IV)
• Single channel provides 4 Gbps throughput for DES and 1.33 Gbps throughput for TDES in @250 MHz in 0.13u
• Suitable for insertion in pipelined designs
• Provides ability to pass cleartext and upto 16 bits of control information through the DES pipline
• No dead cycles for key loading or mode switching
• Suitable for Electronic Codebook (ECB), Cipher Block Chaining (CBC), CFB and OFB implementations
• Proven in FPGA and at 250 MHz in 0.13u technology in system level IPSEC Applications
• Available Optional AHB Interface

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