Exponentiation/RSA Core

The Exponentiation block accelerates Public/Private Key Mathematical operations used in algorithms such as RSA, DSA, Diffie-Hellman. The core is ported verilog RTL also comes with an API which provides functions for RSA encrypt, decrypt, Sign, Verify and RSA Key generation.

Features:

• Available on Tallika Secure SOC FPGA Platform with Tallika Security API and RSA library
• Comes with complete software library for RSA encrypt/ decrypt/key-pair generation including acceleration for primality testing
• hardware acceleration for RSA_encrypt/ RSA_decrypt/ RSA key generation operations
• Native 4096-bit exponentiation operations. Also support native 2048, 1536, 1024, 768, 512 bit operations
• C mod Ns operations may be executed in parallel to exponentiation to accelerate RSA Key Generation.
• Two RSA keys generation under 1 sec @ 50 Mhz operation
• Available Optional APB Interface
  

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